Canon ships first nanoimprint chipmaking machine to R&D lab
- Reference: 1727767988
- News link: https://www.theregister.co.uk/2024/10/01/canon_nanoimprint_lithography_machine/
- Source link:
The tech, we're told, can produce 5nm circuit patterns using a mold, rather than light, to transfer them to a semiconductor wafer.
In October last year, the Japanese multinational [1]revealed it was commercializing a semiconductor manufacturing system using nanoimprint lithography, with its first implementation set to be a room-sized unit catchily named the FPA-1200NZ2C.
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Now the imaging giant has [3]shipped one of the nanoimprint lithography boxes to the [4]Texas Institute for Electronics (TIE) – a semiconductor consortium founded in 2021 which is supported by the University of Texas in Austin, along with numerous chip companies and other public sector and academic organizations. The machine will be used as part of research and development for advanced semiconductors and the production of prototypes.
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According to Canon, its nanoimprint lithography process is cheaper and sucks up less power than rival machines that use a more traditional optical approach. It does not require a light source, which in the latest photolithography equipment from companies such as Dutch giant ASML involves extreme ultraviolet (EUV) wavelengths that are difficult to work with.
In contrast, the [7]nanoimprint system involves transferring a circuit pattern onto the resist coating on the surface of the wafer using a mold that is pressed into it like a stamp. This sounds simple, but Canon insists there are numerous issues with making it work reliably, which is why the technology was long regarded as a challenge.
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Industry experts have previously expressed skepticism, with Gartner analyst Gaurav Gupta [9]casting doubt over the technology when Canon first announced it last year. He said there was a big gap between research and development at leading-edge nodes versus high-volume execution – which may not matter if the machine is being used for development and prototyping.
[10]US may exempt latest chip fabs from eco red-tape, but power is still a trip
[11]TSMC, Samsung reportedly eye UAE's silicon fields for fab expansion
[12]Dutch government takes ASML export measures off Uncle Sam's hands
[13]China's chip tech still lags the West – by up to five generations
Regardless of these challenges, Canon claims fine circuit patterns on the mask can be faithfully reproduced on the wafer, enabling patterns with a minimum line width of 14nm. It claims this is equivalent to the 5nm process technology used to manufacture many of the most advanced logic chips currently available.
But there is also the question of how the mold or mask is produced. The answer is that these are also created using another machine – manufactured by Canon, of course.
Canon's deputy chief executive for optical products, Kazunori Iwamoto, expects to sell around 10 to 20 nanoimprint lithography units annually within five years.
TIE, where the machine is headed, was [14]awarded $840 million in July by Pentagon research agency DARPA to help fund development of the next generation of high-performing semiconductor systems for the US military. The funding will be used to establish a national open access R&D and prototyping fabrication facility, as well as modernization of two existing fabrication facilities at the university. ®
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[1] https://www.theregister.com/2023/10/13/canon_nanoimprint_litho/
[2] https://pubads.g.doubleclick.net/gampad/jump?co=1&iu=/6978/reg_offbeat/science&sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&tile=2&c=2ZvvISPIJtK6Z1C2LyfknGwAAAZA&t=ct%3Dns%26unitnum%3D2%26raptor%3Dcondor%26pos%3Dtop%26test%3D0
[3] https://global.canon/en/news/2024/20240926.html
[4] https://www.txie.org/
[5] https://pubads.g.doubleclick.net/gampad/jump?co=1&iu=/6978/reg_offbeat/science&sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&tile=4&c=44ZvvISPIJtK6Z1C2LyfknGwAAAZA&t=ct%3Dns%26unitnum%3D4%26raptor%3Dfalcon%26pos%3Dmid%26test%3D0
[6] https://pubads.g.doubleclick.net/gampad/jump?co=1&iu=/6978/reg_offbeat/science&sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&tile=3&c=33ZvvISPIJtK6Z1C2LyfknGwAAAZA&t=ct%3Dns%26unitnum%3D3%26raptor%3Deagle%26pos%3Dmid%26test%3D0
[7] https://global.canon/en/technology/nil-2023.html
[8] https://pubads.g.doubleclick.net/gampad/jump?co=1&iu=/6978/reg_offbeat/science&sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&tile=4&c=44ZvvISPIJtK6Z1C2LyfknGwAAAZA&t=ct%3Dns%26unitnum%3D4%26raptor%3Dfalcon%26pos%3Dmid%26test%3D0
[9] https://www.theregister.com/2023/10/13/canon_nanoimprint_litho/
[10] https://www.theregister.com/2024/09/25/chip_fabs_us_power/
[11] https://www.theregister.com/2024/09/23/tsmc_samsung_uae_fab/
[12] https://www.theregister.com/2024/09/06/dutch_asml_export_controls/
[13] https://www.theregister.com/2024/08/21/china_us_chip_tech_gap_report/
[14] https://www.theregister.com/2024/07/18/darpa_awards_840m_to_utaustin/
[15] https://whitepapers.theregister.com/
No touching
What do I know, but you would think that defectivity from particles would be a major issue here ….
Re: No touching
Can't be so different from the optical process, in that any contaminants in the region of the wafer are going to be catastrophic at that scale of process.
Ok, someone's got to ask... How are they making the "mould" with 14nm features?
Isn't that process very likely to be lithographic to achieve the feature size, and if so, why is this machine cheaper?
I'm guessing but like any other mould you might spend a lot of money and time making the mould but you only do that once then the products you make from it are much easier and cheaper to produce.
Right now the expensive lithographic process needs to be done every time.
Taking a leaf from HP's playbook?
We've got this really nice printer... but you've got to use our ink...
Wiping my inky fingers on someone else's jacket --->