Epyc move: Micron shifts high-demand chip design apps to AMD
(2022/03/21)
- Reference: 1647883809
- News link: https://www.theregister.co.uk/2022/03/21/micron_now_uses_amd_for/
- Source link:
Micron Technology is now using AMD's [1]newly announced third-generation Epyc server CPUs to power most of its high-demand applications for designing memory and storage chips.
Ram Peddibhotla, AMD's corporate vice president of Epyc product management, told The Register last week about Micron's decision, and a spokesperson for Micron later confirmed to us that it moved "most of its most demanding" electronic design automation applications to servers with AMD's CPUs last year.
"They have a state-of-the-art, high performance architecture for EDA to get them to design their products [and] maximize productivity for their designers," he said.
[2]
This allowed Micron to improve EDA performance by 30 percent, and it also lowered the combined upfront and ongoing costs for running datacenters, according to Peddibhotla.
[3]
[4]
He added that Micron is now testing servers with AMD's new Epyc "Milan-X" processors — [5]which were officially released on Monday — and found that they provide an additional 40 percent performance boost over last year's third-gen EPYC chips on select EDA workloads thanks to the CPU's large 768MB of L3 cache.
"It was really, really good with [AMD's third-gen Epyc] and getting even better with Milan-X," he said.
[6]
Micron did not say which CPU architecture the company previously used for its EDA datacenters, but what's notable to us is that the company did not choose [7]Intel's latest Xeon processors , which is understandable if AMD's latest performance comparisons are reliable. A major supplier of memory and storage technologies, Micron brought in $27.7bn in revenue last year. ®
[8]AMD: Our new, pricier mega-cache Epyc CPUs leapfrog Intel's
[9]AlmaLinux OS Foundation welcomes AMD to the fold
[10]If you want to make your own chip and aren't Microsoft rich, who do you turn to?
[11]Intel axes older FPGA cards, moves development into hands of customers
[12]SiFive bags $175m to further challenge Arm with RISC-V
Peddibhotla said the move is part of a "long-running collaboration" between chipmaker and Micron, which also includes validating AMD's products on Micron's DDR5 memory and SSD technologies.
"Micron and AMD share a vision of delivering full capability of leading DDR5 memory to high-performance datacenter platforms," said Raj Hazra, a former Intel executive who now leads Micron's Compute and Networking Business Unit, in a canned statement.
Launched on Monday, [13]AMD's new Epyc Milan-X chips pack a massive 768MB of L3 cache thanks to the company's new 3D V-Cache technology that allowed the chipmaker to triple the L3 for every group of cores on the processor, also known as the core complex die. The chipmaker said this has a major impact on cache-sensitive applications, namely technical computing workloads like EDA. ®
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[5] https://www.theregister.com/2022/03/21/amd_epyc_cpu/
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[7] https://www.theregister.com/2021/04/06/ice_lake_xeon_intel/
[8] https://www.theregister.com/2022/03/21/amd_epyc_cpu/
[9] https://www.theregister.com/2022/03/18/almalinux_os_foundation_amd/
[10] https://www.theregister.com/2022/03/17/efabless_factory_access/
[11] https://www.theregister.com/2022/03/16/intel_fpga_accelerators/
[12] https://www.theregister.com/2022/03/16/sifive_175m_series_f/
[13] https://www.theregister.com/2022/03/21/amd_epyc_cpu/
[14] https://whitepapers.theregister.com/
Ram Peddibhotla, AMD's corporate vice president of Epyc product management, told The Register last week about Micron's decision, and a spokesperson for Micron later confirmed to us that it moved "most of its most demanding" electronic design automation applications to servers with AMD's CPUs last year.
"They have a state-of-the-art, high performance architecture for EDA to get them to design their products [and] maximize productivity for their designers," he said.
[2]
This allowed Micron to improve EDA performance by 30 percent, and it also lowered the combined upfront and ongoing costs for running datacenters, according to Peddibhotla.
[3]
[4]
He added that Micron is now testing servers with AMD's new Epyc "Milan-X" processors — [5]which were officially released on Monday — and found that they provide an additional 40 percent performance boost over last year's third-gen EPYC chips on select EDA workloads thanks to the CPU's large 768MB of L3 cache.
"It was really, really good with [AMD's third-gen Epyc] and getting even better with Milan-X," he said.
[6]
Micron did not say which CPU architecture the company previously used for its EDA datacenters, but what's notable to us is that the company did not choose [7]Intel's latest Xeon processors , which is understandable if AMD's latest performance comparisons are reliable. A major supplier of memory and storage technologies, Micron brought in $27.7bn in revenue last year. ®
[8]AMD: Our new, pricier mega-cache Epyc CPUs leapfrog Intel's
[9]AlmaLinux OS Foundation welcomes AMD to the fold
[10]If you want to make your own chip and aren't Microsoft rich, who do you turn to?
[11]Intel axes older FPGA cards, moves development into hands of customers
[12]SiFive bags $175m to further challenge Arm with RISC-V
Peddibhotla said the move is part of a "long-running collaboration" between chipmaker and Micron, which also includes validating AMD's products on Micron's DDR5 memory and SSD technologies.
"Micron and AMD share a vision of delivering full capability of leading DDR5 memory to high-performance datacenter platforms," said Raj Hazra, a former Intel executive who now leads Micron's Compute and Networking Business Unit, in a canned statement.
Launched on Monday, [13]AMD's new Epyc Milan-X chips pack a massive 768MB of L3 cache thanks to the company's new 3D V-Cache technology that allowed the chipmaker to triple the L3 for every group of cores on the processor, also known as the core complex die. The chipmaker said this has a major impact on cache-sensitive applications, namely technical computing workloads like EDA. ®
Get our [14]Tech Resources
[1] https://www.theregister.com/2022/03/21/amd_epyc_cpu/
[2] https://pubads.g.doubleclick.net/gampad/jump?co=1&iu=/6978/reg_onprem/systems&sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&tile=2&c=2YjkDoT7D65gX92ftABf07wAAAI4&t=ct%3Dns%26unitnum%3D2%26raptor%3Dcondor%26pos%3Dtop%26test%3D0
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[5] https://www.theregister.com/2022/03/21/amd_epyc_cpu/
[6] https://pubads.g.doubleclick.net/gampad/jump?co=1&iu=/6978/reg_onprem/systems&sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&tile=4&c=44YjkDoT7D65gX92ftABf07wAAAI4&t=ct%3Dns%26unitnum%3D4%26raptor%3Dfalcon%26pos%3Dmid%26test%3D0
[7] https://www.theregister.com/2021/04/06/ice_lake_xeon_intel/
[8] https://www.theregister.com/2022/03/21/amd_epyc_cpu/
[9] https://www.theregister.com/2022/03/18/almalinux_os_foundation_amd/
[10] https://www.theregister.com/2022/03/17/efabless_factory_access/
[11] https://www.theregister.com/2022/03/16/intel_fpga_accelerators/
[12] https://www.theregister.com/2022/03/16/sifive_175m_series_f/
[13] https://www.theregister.com/2022/03/21/amd_epyc_cpu/
[14] https://whitepapers.theregister.com/