Seagate says it's designed two of its own RISC-V CPU cores – and they'll do more than just control storage drives
- Reference: 1607450405
- News link: https://www.theregister.co.uk/2020/12/08/seagate_risc_v_computational_storage/
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The disk drive maker told us one of the homegrown CPUs is focused on high performance, and the other is optimized for area, ie: it's less powerful though smaller and thus uses takes up less silicon on a die. Both cores are said to include RISC-V's security features, and are drive-agnostic, which means that they can be used with SSDs as well as hard disk drives.
Given that Seagate, which typically uses the Arm architecture for its chips, said it shipped about a billion CPU cores last year in its storage products, this development may signal a coming surge in RISC-V processor shipments. Western Digital and others are, for what it's worth, using RISC-V cores for disk and solid-state drive controllers.
Core announcements
Seagate – which is a member of RISC-V International, the steering body of the RISC-V world – appears to have a collection of uses in mind for its processor cores.
For instance, it said the high-performance core has been fabricated as an actual chip, and demonstrated as a controller in a hard disk drive. We're told the customized RISC-V CPU outperforms cores currently used for real-time HDD control, and it "paves the way for finer positioning [of drive heads] by implementation of advanced servo (motion control) algorithms" – presumably because Seagate can tune its core to suit this particular job.
The area-optimized core, meanwhile, has been designed though not yet fabricated, and is aimed at "auxiliary, supporting, or background workloads," and performing "security-sensitive edge computational operations." To us that sounds like, for instance, a security co-processor that provides root-of-trust for a system. The Google-led [1]OpenTitan project said it is collaborating with Seagate to produce an open-source silicon-level root-of-trust RISC-V chip.
In addition, Seagate talked up the computational abilities of its cores, and said the CPUs "will also accelerate real-time analysis in the data center and at the edge. Such analysis is crucial to the work of scientific communities with mass data needs." In other words, these cores aren't just aimed at steadying drive motors or performing flash wear-leveling; they'll be expected to handle extra processing tasks.
RISC-V “creates an opportunity to implement application-specific computational capabilities that enable massive parallel computational storage solutions," said Seagate CTO John Morris ahead of his [2]keynote today at this year's virtual RISC-V Summit, during which the new CPU cores is due to be announced. "We believe that these architectures support many important use cases that include scientific simulation (for example, weather prediction) as well as the learning part of machine learning.”
SiFive inches closer to offering a true RISC-V PC: Latest five-core dev board includes PCIe, SSD interfaces [3]READ MORE
Brad Settlemyer, senior research scientist at America's Los Alamos National Laboratory, said in a statement that "using computational storage to move processing near data has begun to significantly alter the way we analyse data and perform scientific discovery.
“By having compute integrated closely with storage we are able to create persistent data transformations that speed up data analysis by 1000-fold. This greatly relieves our primary compute tier from these tasks. We will be continuing our drive toward efficiency gains for our mission needs by partnering with vendors and actively participating in important industry initiatives like computational storage.”
[4]RISC-V is an open-source, royalty-free instruction set architecture that's backed by Google, Alibaba, Huawei, IBM, Western Digital, SiFive, Microchip, and [5]more . Its steering body sets the [6]specifications , and it's up to companies to implement them in silicon. There are [7]free open-source and paid-for closed-source building blocks available from various outfits if you don't fancy designing it all from scratch. The emphasis is on customization. This is in contrast to rival Arm, which sells licenses for its chip designs and is much stricter on the customization of cores.
Cecil Macgregor, who runs Seagate's ASIC development, said the manufacturer has "now expanded the capability to add customized RISC-V cores to our portfolio, which is critical to future products." By the time you read this, there should be [8]more info here .
Computational storage competition
With this move into computational storage, Seagate will compete toe-to-toe with Eideticom, NGD, Nyriad, [9]Samsung , and [10]ScaleFlux . These vendors produce SSD storage drives with added processors, typically Arm-based, to perform repetitive, low-level storage operations, such as compression, deduplication, encryption, and video transcoding. The intention is to both offload work from a host server's CPU cores so that they can do more application processing, and accelerate the storage operations. ®
Get our [11]Tech Resources
[1] https://www.theregister.com/2019/11/05/google_opentitan_soc_riscv/
[2] https://tmt.knect365.com/risc-v-summit/agenda/1/?searchInput=#keynotes_risc-v-accelerating-innovation-in-data-storage_9-30am
[3] https://www.theregister.com/2020/10/29/sifive_riscv_pc/
[4] https://www.theregister.com/2020/03/09/risc_v_intel_amd_arm/
[5] https://riscv.org/members/
[6] https://riscv.org/technical/specifications/
[7] https://github.com/riscv/riscv-cores-list
[8] https://www.seagate.com/innovation/risc-v/
[9] https://blocksandfiles.com/2020/11/10/samsung-csd-ssd-xilinx/
[10] https://blocksandfiles.com/2020/04/20/scaleflux-csd-hardware-compression-computational-storage/
[11] https://whitepapers.theregister.com/
Apple moved from (6502 to) 68k to PowerPc to x86 to ARM while migrating software via emulation layers so why could't they move to RiscV (which is a much smaller change than any previous change) and effectiviely take the entire CPU "In house" (no need for an architecture licences ... actually, they probably have no need for RiscV and could probably design their own architecture if they wanted). So, why should they pay ARM any "significant" license/royalty fees as they've got very little dependency on ARM as their ecosystem is targetting the architecuter they define which just happens to be moving to ARM at the moment.
So a billion CPU's a year .... even if ARM only get 1c per CPU roylaties then you can probably afford to run a decent CPU design team for less than that and know that all the software tool sife is availbale "for free" (ol, you can probably afford to put a bit towards this as well - but you don't have to) ... not looking good got ARM (or is that ARMnVidia)
N.b. 20-25 years ago when ARM were the "up and coming architecture" other processor architectures had to deal with the "its just a processor and ARM looks cheap - plus our new grads used it at Uni" argument and mostly lost ... looks like the boot is on the other foot now!
In that ARM license you're paying for the patents they've taken out over the years, as well. You've got to be careful not to implement something ARM patented in your RISC-V chip or you'll really pay for it.
Patents
FWIW I asked the RISC-V Int'l directors about patents, and they were pretty sure anything they spec out that Arm could claim ownership of could be traced back to pre-Arm days, or would be entirely new and novel.
I think there's going to be a patent royal rumble at some point. One side - and not just Arm or a RISC-V member - is going to crack and it's going to kick off, and we'll find out that once again IBM has the patent on adding 4 to the program counter each cycle.
C.
Well, hopefully this means they’ll be putting a bit more effort into their control logic and software going forwards. Anyone who has ever done any data recovery on them will tell you that their current stuff appears to have been shat out rather than ‘developed’.
Embedded SQL?
When SCSI first replaced SASI (about 40 years ago) I proposed disk drives with embedded SQL processors, so, instead of looking up your info via a file system, you searched for it in a database. In other words, instead of telling the drive where to look for the data, you tell it what you want, and ask it to go and find it.
Of course, this costs computing power, but if you are getting the computing power for the price of 1/2 teaspoon-full of sand (incremental cost of Risc-V) then why not use it to off load processing from your (Beowulf cluster of) mainstream CPUs? Postgresql is pretty cheap these days, as it does not need to fund any AC75 yachts. (If you need any good indexing algorithms for text, PM me - I want an AC75 for myself).
(At the time I was proposing to use an array of pipelines of Transputers, but Mrs Thatcher quietly took the Transputer round the back of the shed and shot it).
Who cares about shipments?
it shipped about a billion CPU cores last year in its storage products, this development may signal a coming surge in RISC-V processor shipments
And does that matter to anyone? The fabs likely don't care the architecture. If it's a fairly a small number of designs, it doesn't even suggest a large number of RISC-V jobs in the job market, either.
"And does that matter to anyone?"
Uh yeah, it matters a lot. It's a validation of a design, for one thing. You're right that the fabs -- and by that, we mean TSMC, etc -- don't care about the architecture. That's not their job.
But people further up the chain considering using the architecture will think it matters. 'Can we trust that this tech works?' 'Well, Seagate just put XYZm into production.'
C.
"may signal a coming surge in RISC-V processor shipments"
May also signal concerns about the future ownership of Arm.