Landing today in the GNU Compiler Collection (GCC) codebase is initial support for the AI Compute Extensions (ACEv1) as the initial work out of the x86 Ecosystem Advisory Group between Intel and AMD for a common matrix acceleration architecture for helping AI/ML workloads with future CPUs.

ACE is ultimately going to be the successor to Intel's Advanced Matrix Extensions (AMX) with more enhancements plus will see support on future AMD processors too. Published in June was the ACEv1 extension documentation while since July we began seeing [1]ACEv1 patches on the GCC mailing list . Intel compiler engineers [2]as well as AMD engineers have been working on ensuring this open-source compiler support is ready for upcoming ACEv1 on future generation CPUs.

After a lot of review and discussions around ACEv1 the past two months, hitting the [3]GCC Git code today for [4]GCC 17 was the initial ACE enablement patches.

GCC 17.1 debuting next March~April will now be ready with the first generation AI Compute Extensions support. The new -macev1 compiler flag is used for enabling ACEV1 built-in functions and code generation plus it also implies AVX10.1, AVX/AVX2, and SSE/SSE4 extensions.

We'll see what more ACE enablement work arrives in GCC 17 before its stable release. Separately, [5]this LLVM pull request is where the ACE v1 enablement work is ongoing for the open-source LLVM/Clang compiler.



[1] https://www.phoronix.com/news/Intel-GCC-ACE-AI-Patches

[2] https://www.phoronix.com/news/GCC-AVX10-V2-AUX-Patches

[3] https://gcc.gnu.org/git.html

[4] https://www.phoronix.com/search/GCC+17

[5] https://github.com/llvm/llvm-project/pull/208408