As the latest on the compiler enablement front for Intel's next-gen Xeon " [1]Diamond Rapids processors, LLVM Git has merged support for the AMX-AVX512 instructions for next spring's Clang 20 compiler release.

AMX-AVX512 is one of several new ISA additions around Advanced Matrix Extensions (AMX) that are coming with Xeon Diamond Rapids. Intel's open-source compiler engineers for both LLVM/Clang and GCC have been working on [2]enabling the several new ISA additions to be found with next year's Xeon processors. The [3]-march=diamondrapids patch confirms all of the new ISA additions compared to current Xeon Granite Rapids processors.

The [4]latest Intel PPM details all of the new instruction details for those interested in that information.

It's with [5]this commit overnight that AMX-AVX512 was merged for LLVM. The other recent Intel additions to LLVM 20 include AMX-FP8 and AMX-TRANSPOSE too. By the time of the LLVM/Clang 20.1 release next ~March all of the Intel Diamond Rapids compiler support will likely be addressed.



[1] https://www.phoronix.com/search/Diamond+Rapids

[2] https://www.phoronix.com/news/Intel-GCC-Diamond-Rapids-ISA

[3] https://www.phoronix.com/news/Intel-Diamond-Rapids-APX-AVX10

[4] https://cdrdv2.intel.com/v1/dl/getContent/671368

[5] https://github.com/llvm/llvm-project/commit/58a17e1bbc54357385d0b89cfc5635e402c31ef6