Intel Preps More Xe2 Lunar Lake & Battlemage Driver Code For Linux 6.12
- Reference: 0001487193
- News link: https://www.phoronix.com/news/Intel-Preps-More-Xe2-Linux-6.12
- Source link:
The latest [1]drm-xe-next pull request for DRM-Next was submitted on Thursday. Of which there are fixes plus "other changes are the missing bits for Xe2 (LNL and BMG)." Intel continues being quite busy on the Xe2 front and trying to get the Lunar Lake graphics support enabled out-of-the-box with Linux 6.12 at least for the Lunar Lake graphics.
With Lunar Lake laptops set to initially launch in early September, the default enabling of Lunar Lake graphics on Linux is running late. The Linux 6.12 merge window isn't even until mid-September while the stable Linux 6.12 release will be out in November. So for those planning to buy a new Intel Core Ultra Lunar Lake laptop around launch-day, you'll either need to be back-porting some kernel patches to your desired kernel, rolling the device with the "force_probe" option to enable the support, or wait it out for the Xe2 Linux support to further stabilize. I plan on buying a Lunar Lake laptop on launch-day for Linux testing to be able to shed more light on the support. For now the Lunar Lake Linux graphics driver support isn't yet flipped on by default. With the support not yet on by default, this week's pull does raise the minimum GuC firmware version required for the Xe2 driver support.
This drm-xe-next pull for the week does bring the following changes:
- Use dma_fence_chain_free in chain fence unused as a sync
- Refactor hw engine lookup and mmio access to be used in more places
- Enable priority mem read for Xe2 and later
- Fix PL1 disable flow in xe_hwmon_power_max_write
- Fix refcount and speedup devcoredump
- Add performance tuning changes to Xe2
- Fix OA sysfs entry
- Add first GuC firmware support for BMG
- Bump minimum GuC firmware for platforms under force_probe to match LNL and BMG
- Fix access check on user fence creation
- Add/document workarounds for Xe2
- Document workaround and use proper WA infra
- Fix VF configuration on media GT
- Fix VM dma-resv lock
- Allow suspend/resume exec queue backend op to be called multiple times
- Add GT stats to debugfs
- Add hwconfig to debugfs
- Compile out all debugfs code with ONFIG_DEUBG_FS=n
- Offload system clear page to GPU
- Remove dead kunit code
- Refactor drvdata storing to help display
- Cleanup unsused xe parameter in pte handling
- Rename s/enable_display/probe_display/ for clarity
- Fix missing MCR annotation in couple of registers
- Fix DGFX display suspend/resume
- Prepare exec_queue_kill for PXP handling
- Fix devm/drmm issues
- Fix tile fini sequence
- Fix crashes when probing without firmware in place
- Use xe_managed for kernel BOs
- Future-proof dss_per_group calculation by using hwconfig
- Use reserved copy engine for user binds on faulting devices
- Allow mixing dma-fence jobs and long-running faulting jobs
- Cleanup redundant arg when creating use BO
- Prevent UAF around preempt fence
- Fix display suspend/resume
- Use vma_pages() helper
Sent out today meanwhile was the latest [2]drm-intel-gt-next pull request with more workarounds for DG2/Alchemist, Meteor Lake, Arrow Lake, and other fixes. This pull also now enables partial memory mapping of GPU virtual memory.
[1] https://lore.kernel.org/dri-devel/hecdxenxufrcps4ktypq64p3r6h5hp77c2sag2mkkvcmjploge@iyixts55vxus/T/#meb6e0b8107eb60fdfd9e876d935892bd651714d5
[2] https://lore.kernel.org/dri-devel/ZshcfSqgfnl8Mh4P@jlahtine-mobl.ger.corp.intel.com/
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