As a follow up to the article from a few weeks ago of Intel [1]publishing the AVX10.2 specifications and posting GCC compiler patches for that next iteration of AVX10, the initial support was merged today into the GNU Compiler Collection.

GCC 15 that will debut as stable in early 2025 now carries preliminary support for AVX10.2-256 and AVX10.2-512. The initial support is wired up with the -mavx10.2, -mavx10.2-256, and -mavx10.2-512 compiler flags. More AVX10.2 patches for additional new instructions remain a work in progress but that too will likely all be wrapped up by the time GCC 15 feature development concludes toward the end of the calendar year.

AVX10.2 is coming with future Intel processors and is notable in that it's the first AVX10 version that will be found on both Intel P cores and E cores. AVX10.2 adds new AVX10 BF16 instructions, compare scalar FP with enhanced eflags, new convert instructions, integer and FP16 VNNI media new instructions, new min/max instructions, and saturating convert instructions.

As of this morning the initial AVX10.2 support is [2]merged in GCC Git. This follows LLVM/Clang earlier in the month also [3]seeing initial AVX10.2 support land for LLVM 20 that will also be out in the early months of 2025.

Kudos to Intel as always for their very punctual open-source compiler upstreaming work for new CPU targets and ISA additions as well as all of their other open-source toolchain contributions from new features to performance tuning.



[1] https://www.phoronix.com/news/Intel-AVX10.2-Details-GCC

[2] https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=4bcb480d103b36c389daaf711f0f25d74379adb6

[3] https://www.phoronix.com/news/LLVM-Clang-20-Intel-AVX10.2