In-step with [1]the GCC compiler beginning to see Intel AVX10.2 support patches, the LLVM Clang 20 Git code is already seeing initial AVX10.2 code merged for this open-source compiler.

AVX10.2 adds new AVX10 BF16 instructions, compare scalar FP with enhanced eflags, new convert instructions, integer and FP16 VNNI media new instructions, new min/max instructions, and saturating convert instructions. AVX10.2 is also the first AVX10 version that will be found on both P and E core processors in the future. Following [2]Intel documenting AVX10.2 in a new architecture specification published a few days ago, Intel engineers have begun volleying their AVX10.2 patches to both GCC and LLVM/Clang.

Already some of the initial AVX10.2 code is merged to LLVM Git for what will debut as LLVM/Clang 20.1 early next year. That initial work includes adding the AVX10.2 knobs and supporting the new YMM rounding instructions, enabling the VMPSADBW/VADDP[D,H,S] new instructions, and new MINMAX instructions. There are also pull requests opened for supporting the AVX10.2 VNNI FP16/INT8/INT16 new instructions, AVX10.2 BF16 instructions, AVX10.2 CONVERT instructions, and AVX10.2 SATCVT instructions.

[3]

Those wishing to track the progress of AVX10.2 feature enablement for the LLVM Clang compiler can checkout [4]this GitHub search for all the details on this ongoing effort ahead of Intel processors coming in the next year or two with AVX10.2 support.



[1] https://www.phoronix.com/news/Intel-AVX10.2-Details-GCC

[2] https://cdrdv2.intel.com/v1/dl/getContent/828965

[3] https://www.phoronix.com/image-viewer.php?id=2024&image=llvm_clang_avx102_lrg

[4] https://github.com/llvm/llvm-project/pulls?q=is%3Apr+AVX10.2