Intel closed out July by publishing AVX10.2 technical details as part of a now public document. Intel's compiler engineers are also already at work on enabling AVX10.2 in the GCC and LLVM/Clang compilers.

AVX10.2 adds YMM rounding control support and new instructions. An initial AVX10.2 patch was already posted for GCC while over the next few weeks Intel engineers will be posting the YMM rounding and new instructions code for the GNU Compiler Collection.

The newly-public AVX10.2 technical details can be found via [1]this Intel.com document . AVX10.2 adds new AVX10 BF16 instructions, compare scalar FP with enhanced eflags, new convert instructions, integer and FP16 VNNI media new instructions, new min/max instructions, and saturating convert instructions. All the technical details on the new AVX10.2 instructions can be found from the Intel document.

Per prior disclosures from Intel, AVX10.2 is quite exciting in being the first AVX10 version that will be supported on both P cores and E cores. It remains to be seen though which cores will be the first to debut with AVX10.2 support but likely still one to two years out. It's with the upcoming Intel Xeon Granite Rapids processors where there is AVX10.1/512 rolling out.

The start of the GCC compiler enablement for AVX10.2 with the initial plumbing and compiler switches can be found via [2]this patch today on the GCC mailing list. Look for more coming out in August. Intel continues being quite punctual in getting their [3]AVX10 support ironed out in the open-source toolchains.



[1] https://cdrdv2.intel.com/v1/dl/getContent/828965

[2] https://gcc.gnu.org/pipermail/gcc-patches/2024-August/658956.html

[3] https://www.phoronix.com/search/AVX10