News: 0001480098

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RISC-V Sees Support For New ISA Extensions In Linux 6.11

([RISC-V] 6 Hours Ago Linux 6.11 RISC-V)


Palmer Dabbelt on Saturday sent out the RISC-V architecture updates for the ongoing [1]Linux 6.11 merge window.

Most significant with the RISC-V updates this cycle are adding support for various new ISA extensions. Newly-enabled RISC-V extensions include the Zve32[xf] and Zve64[xfd] sub-extensions of the vector extension, Zimop and Zcmop for may-be-operations, the Zca / Zcf / Zcd / Zcb sub-extensions of the C extension, and Zawrs. The vector permutation extensions (Zve*) may be of interest to some along with Zawrs as the wait-on-reservation-set for helping to allow RISC-V cores to enter a low power state while waiting on a store to a memory location.

RISC-V with Linux 6.11 also has a number of performance improvements and [2]memory hot-plugging support . The RISC-V memory hot-plugging code also allows for memory hot un-plugging.

More details on the RISC-V changes to find for the Linux 6.11 merge window via [3]this pull request .



[1] https://www.phoronix.com/search/Linux+6.11

[2] https://www.phoronix.com/news/RISC-V-Linux-6.11-Hot-Memory

[3] https://lore.kernel.org/lkml/mhng-099fa737-a1fc-466d-bf27-9ad62173bb45@palmer-ri-x1c9/



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