GCC & LLVM/Clang Compilers Updated For Intel Branch Hint
([Intel] 6 Hours Ago
x86 Branch Hint)
- Reference: 0001476427
- News link: https://www.phoronix.com/news/GCC-Clang-Intel-x86-Branch-Hint
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Both the GCC and LLVM/Clang compilers today saw support for Intel's Branch Hint extension merged today for this feature of Redwood Cove P cores as found with current generation Meteor Lake processors as well as upcoming Intel Granite Rapids server processors.
One of the many new features with the Redwood Cove microarchitecture is the Branch Hint x86 architecture extension. The Branch Hint is described within [1]Intel's documentation as:
"Starting with the Redwood Cove microarchitecture, if the predictor has no stored information about a branch, the branch has the Intel SSE2 branch taken hint (i.e., instruction prefix 3EH), When the codec decodes the branch, it flips the branch’s prediction from not-taken to taken. It then flushes the pipeline in front of it and steers this pipeline to fetch the taken path of the branch.
...
The hint is only used when the predictor does not have stored information about the branch. To avoid code bloat and reducing the instruction fetch bandwidth, don’t add the hint to a branch in hot code—for example, a branch inside a loop with a high iteration count—because the predictor will likely have stored information about that branch. Ideally, the hint should only be added to infrequently executed branches that are mostly taken, but identifying those branches may be difficult. Compilers are advised to add the hints as part of profile-guided optimization, where the one-sided execution path cannot be laid out as a fall-through. The Redwood Cove microarchitecture introduces new performance monitoring events to guide hint placement.
Judiciously adding hints can reduce the program’s run time by reducing the branch misprediction penalty. Hints are especially useful for large code footprint workloads where the number of branches exceeds the predictor's capacity."
[2]
LLVM has [3]merged support for x86 Branch Hint. The GCC compiler also saw new code [4]merged today for dealing with this Branch Hint capability on Redwood Cove cores. LLVM 19 is currently under development for debut around September while GCC Git is tracking for next year's GCC 15 release.
[1] https://www.intel.com/content/www/us/en/content-details/821612/intel-64-and-ia-32-architectures-optimization-reference-manual-volume-1.html
[2] https://www.phoronix.com/image-viewer.php?id=2024&image=intel_branch_hint_lrg
[3] https://github.com/llvm/llvm-project/commit/e603451f3cb16792fb46ab5f2fa50b05f3e5d935
[4] https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=a910c30c7c27cd0f6d2d2694544a09fb11d611b9
One of the many new features with the Redwood Cove microarchitecture is the Branch Hint x86 architecture extension. The Branch Hint is described within [1]Intel's documentation as:
"Starting with the Redwood Cove microarchitecture, if the predictor has no stored information about a branch, the branch has the Intel SSE2 branch taken hint (i.e., instruction prefix 3EH), When the codec decodes the branch, it flips the branch’s prediction from not-taken to taken. It then flushes the pipeline in front of it and steers this pipeline to fetch the taken path of the branch.
...
The hint is only used when the predictor does not have stored information about the branch. To avoid code bloat and reducing the instruction fetch bandwidth, don’t add the hint to a branch in hot code—for example, a branch inside a loop with a high iteration count—because the predictor will likely have stored information about that branch. Ideally, the hint should only be added to infrequently executed branches that are mostly taken, but identifying those branches may be difficult. Compilers are advised to add the hints as part of profile-guided optimization, where the one-sided execution path cannot be laid out as a fall-through. The Redwood Cove microarchitecture introduces new performance monitoring events to guide hint placement.
Judiciously adding hints can reduce the program’s run time by reducing the branch misprediction penalty. Hints are especially useful for large code footprint workloads where the number of branches exceeds the predictor's capacity."
[2]
LLVM has [3]merged support for x86 Branch Hint. The GCC compiler also saw new code [4]merged today for dealing with this Branch Hint capability on Redwood Cove cores. LLVM 19 is currently under development for debut around September while GCC Git is tracking for next year's GCC 15 release.
[1] https://www.intel.com/content/www/us/en/content-details/821612/intel-64-and-ia-32-architectures-optimization-reference-manual-volume-1.html
[2] https://www.phoronix.com/image-viewer.php?id=2024&image=intel_branch_hint_lrg
[3] https://github.com/llvm/llvm-project/commit/e603451f3cb16792fb46ab5f2fa50b05f3e5d935
[4] https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=a910c30c7c27cd0f6d2d2694544a09fb11d611b9
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