IBM Says It Can Fit Nearly 100 Billion Transistors On a Chip (zdnet.com)
- Reference: 0184171602
- News link: https://hardware.slashdot.org/story/26/06/29/0049218/ibm-says-it-can-fit-nearly-100-billion-transistors-on-a-chip
- Source link: https://www.zdnet.com/education/computers-tech/ibm-claims-beyond-nanometer-milestone-with-sub-1-nm-nanostack-chip-architecture/
> At the heart of the announcement is NanoStack. This is a three-dimensional, nanosheet-based transistor design that scales vertically, or along the z-axis, by stacking and staggering CMOS devices. Unlike today's nanosheet architectures, which IBM also pioneered and which are being adopted by leading foundries at 3 nm and 2 nm, NanoStack bonds two nanosheet transistors into a single vertical structure, with each tier optimized independently and contacted from opposite sides. Each transistor in the demonstrated structure uses three sub-5 nm-thick nanosheets, about "15 silicon atoms" across, separated by roughly 9 nm spacers. Two such devices are then bonded vertically using an ultra-thin dielectric process IBM describes as a key innovation. Because the top and bottom devices can use different channel materials, dielectrics, and metals, IBM argues NanoStack is less a single trick and more a transistor platform that can be extended through multiple generations: 7 angstrom (Å), 5 Å, 3 Å, and potentially down to 1 Å in its internal roadmap.
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> An angstrom, by the by, is one ten-billionth of a meter. In terms of chips, an angstrom is a tenth of a nanometer. "This is the world's first sub-1 nanometer chip technology with a new transistor architecture," said Jay Gambetta, Director of IBM Research and IBM Fellow, during a press briefing. "We're not just making smaller transistors, we're reinventing how chips are built to deliver dramatically more power and energy efficiency...." Based on internal benchmarking against its 2 nm node, the company said its new chips will deliver up to 50% higher performance at the same power, or up to 70% lower power for the same performance. Big Blue also highlighted a 40% improvement in the scaling of static random-access memory (SRAM) cell area relative to its 2 nm technology.
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> This is a change IBM described as a "step the industry hasn't seen in over a decade" and one that could be particularly important for AI accelerators that live or die on on-chip memory bandwidth... According to Huiming Bu, IBM's VP of silicon technology R&D, NanoStack is a new paradigm. It's moving chips to scaling fully into three dimensions and giving the industry at least "another decade" of logic advances as it crosses from nanometers into angstroms... The 40% SRAM density bump could also help architects push caches and on-die memory closer to compute units, cutting data movement overhead in training and inference workloads.
IBM sees a path to production use "in as early as the next 5 years", according to the article, and "expects NanoStack to eventually underpin CPUs, GPUs, mobile SoCs, and SRAM arrays."
IBM's VP of silicon technology R&D says the new innovation "can improve performance by 50% compared to the best available chip today, and at the same time can reduce power by 70%."
[1] https://www.zdnet.com/education/computers-tech/ibm-claims-beyond-nanometer-milestone-with-sub-1-nm-nanostack-chip-architecture/
Amazing if it works (Score:5, Insightful)
While I like to come here and rant about stupidity and enshittification, this story gives me a moment to reflect on the amazing achievements we've made as a species. We long ago blew through the wavelengths of visible light, and are now encroaching on X-rays and approaching the sizes of some of the larger atoms with manufactured, active structures. Impressive.
Re: (Score:3, Informative)
I try to remind myself of things like this all the time. For every time you see some awful story on the news about things getting worse and people being awful to each other, remember that humans are also capable of things like building at the atomic level, sending people to and bringing them home from other celestial bodies, eradicating diseases, and creating masterpieces like the Night Watch and the ceiling of the Sistine Chapel. We're an amazing species and everyone needs to remember that now and then.
Re: (Score:2)
The transistors aren't actually smaller. It's standard in the field to market the next chip generation as a smaller size when they mean equivalent to the new size. In this case the transistors are stacked vertically so looking down you get layers X areal density of the 2 dimensional surface. We don't do this with flash stacks, which now have up to 321 layers and are mapped to 1000+.
Re: Amazing if it works (Score:2)
They are truly awe inspiring achievements. It's too bad that if history is any indication, and IBM history in particular, they will be used to murder people efficiently
Using Z (Score:5, Informative)
The angstrom scale business is marketing fluff to make the density increase understandable to consumers. But this is one of the developments leveraging the Z dimension that are legitimate progress. The Z dimension gives more than just the same chip folded like origami. The net distance traveled by a signal in a cycle can be reduced, which yields massive improvement in performance without additional cost of power/heat.
Chinese working on 3D chips also (Score:2)
Definitely a promising path. Extracting heat becomes a challenge in 3D silicon.
1 Angstroem (Score:2)
> IBM argues NanoStack is less a single trick and more a transistor platform that can be extended through multiple generations: 7 angstrom (Ã...), 5 Ã..., 3 Ã..., and potentially down to 1 Ã... in its internal roadmap
How would that even work? Isn't single-Angatroem count basically the size of an atomic layer? What's there even left to make a circuit from?...
Re: (Score:2)
These "generational node names" have been nonsense since 22 nm or so. They mean "this is the size we would have have to make the smallest critiical dimension if we were still using the same architecture as back when we were at 22 nm". While critical dimensions have shrunk some, it's really the density that has increased in recent years (mostly due to architecture changes). This stacking is really another density increase. The smallest feature the ASML EUV steppers can print is about 8 nm.
100 Billion? (Score:3)
Sounds like something Dr. Evil would ask for.
Human brain (Score:2)
Reminder of what I read in a magazine some decades ago, that the human brain utilizes just 25 to 50 watts and uses electric and chemical impulses while immersed in conductive fluid. When playing chess, a grandmaster can evaluate at best about 6 moves per second while a computer evaluates millions .. yet the computer is only two or three times better than a human.
IBM has been making big promises (Score:2)
IBM has been making big promises about semiconductors, quantum computing, and other technologies for years.
It's a good way to keep the stock price elevated*.
But what has IBM actually delivered in any of these areas in recent years?
*like Sam Altman and AGI for instance
Which is it? (Score:2)
the company said its new chips will deliver up to 50% higher performance at the same power, or up to 70% lower power for the same performance.
>IBM's VP of silicon technology R&D says the new innovation "can improve performance by 50% compared to the best available chip today, and at the same time can reduce power by 70%."
One of these things is not like the other.
Wow! (Score:2)
That's a one followed by eleven zeroes. Can you count that high?