Red Hat Collaborates with SIFive on RISC-V Support, as RHEL 10 Brings AI Assistant and Post-Quantum Security (betanews.com)
- Reference: 0177715557
- News link: https://linux.slashdot.org/story/25/05/24/041237/red-hat-collaborates-with-sifive-on-risc-v-support-as-rhel-10-brings-ai-assistant-and-post-quantum-security
- Source link: https://betanews.com/2025/05/20/red-hat-enterprise-linux-10-linux-community-ai-security/
Red Hat Enterprise Linux 10 is available in developer preview on the SiFive HiFive Premier P550 platform, which they call "a proven, high performance RISC-V CPU development platform."
> The SiFive HiFive Premier P550 provides a proven, high performance RISC-V CPU development platform. Adding support for Red Hat Enterprise Linux 10, the latest version of the world's leading enterprise Linux platform, enables developers to create, optimize, and release new applications for the next generation of enterprise servers and cloud infrastructure on the RISC-V architecture...
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> SiFive's high performance RISC-V technology is already being used by large organizations to meet compute-intensive AI and machine learning workloads in the datacenter... "With the growing demand for RISC-V, we are pleased to collaborate with SiFive to support Red Hat Enterprise Linux 10 deployments on SiFive HiFive Premier P550," said Ronald Pacheco, senior director of RHEL product and ecosystem strategy, "to further empower developers with the power of the world's leading enterprise Linux platform wherever and however they choose to deploy...."
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> Dave Altavilla, principal analyst at HotTech Vision And Analysis, said "Native Red Hat Enterprise Linux support on SiFive's HiFive Premier P550 board offers developers a substantial enterprise-grade toolchain for RISC-V.
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> "This is a pivotal step forward in enabling a full-stack ecosystem around open RISC-V hardware.
SiFive says the move will "inspire the next generation of enterprise workloads and AI applications optimized for RISC-V," while helping their partners "deliver systems with a meaningfully lower total cost of ownership than incumbent platforms."
"With the growing demand for RISC-V, we are pleased to collaborate with SiFive to support Red Hat Enterprise Linux 10 deployments on SiFive HiFive Premier P550..." said Ronald Pacheco, senior director of RHEL product and ecosystem strategy. .
Beta News notes that [2]there's also a new AI-powered assistant in RHEL 10 , so "Instead of spending all day searching for answers or poking through documentation, admins can simply ask questions directly from the command line and get real-time help
> Security is front and center in this release, too. Red Hat is taking a proactive stance with early support for post-quantum cryptography. OpenSSL, GnuTLS, NSS, and OpenSSH now offer quantum-resistant options, setting the stage for better protection as threats evolve. There's a new sudo system role to help with privilege management, and OpenSSH has been bumped to version 9.9. Plus, with new Sequoia tools for OpenPGP, the door is open for even more robust encryption strategies. But it's not just about security and AI. Containers are now at the heart of RHEL 10 thanks to the new "image mode." With this feature, building and maintaining both the OS and your applications gets a lot more streamlined...
[1] https://www.sifive.com/press/sifive-collaborates-with-red-hat-support-enterprise-linux-risc-v
[2] https://betanews.com/2025/05/20/red-hat-enterprise-linux-10-linux-community-ai-security/
High Performance? (Score:3)
Don't get me wrong, I love the concept of RISC-V. I have that very P550 sitting on my desk right now.
But calling it a "high performance" platform? The thing trades blows with a Raspberry Pi 4, and is absolutely destroyed by a Raspberry Pi 5.
Its really really cool to see RISC-V getting more and more love, just like ARM has gotten. But please dont over-sell yourself that much in terms of a particular piece of hardware's capabilities.
Re: (Score:3)
Yeah, I see RISC V as a potential rival to ARM in the embedded/low power space, but I'm struggling to see the point of it in higher performance areas. It's open source, sure, but it's 1980s CPU technology and an ISA designed to be optimal with 1980s CPU designs. There's a reason most RISC platforms other than ARM and MIPS pretty much disappeared by the early 2000s, and most ARM implementations barely qualify as RISC these days.
I would love to see someone design a modern compact ISA and some reference design
Re: (Score:2)
* amd64, not arm64 *grumbles*
Great (Score:2)
Will this trickle into CentOS? :)
Re: (Score:2)
[1]Yes, it will [centos.org]
[1] https://blog.centos.org/2025/05/initial-centos-support-for-risc-v/