Open ISA champ SiFive leaps aboard Nvidia's proprietary interconnect bandwagon
(2026/01/16)
- Reference: 1768519258
- News link: https://www.theregister.co.uk/2026/01/15/sifive_nvidia_nvlink/
- Source link:
RISC-V champion SiFive has joined a growing number of chip companies by throwing its weight behind Nvidia's proprietary NVLink Fusion interconnect tech, a move that casts doubt on the viability of rival interconnect tech UALink.
SiFive designs CPU cores and processors based on the RISC-V instruction set architecture (ISA) for use in a variety of applications ranging from the edge to the datacenter. The company licenses its designs to customers, who can use them in their own silicon, an arrangement similar to Arm’s business model.
With today's [1]announcement , SiFive’s designs will now include support for NVLink.
[2]
NVLink enables Nvidia’s customers to abstract a rack full of CPUs and GPUs as a single unified accelerator. The tech offers up to 3.6 TB/s of chip-to-chip bandwidth.
[3]
[4]
Until recently, Nvidia kept NVLink to itself. However, with the [5]introduction of NVLink Fusion last year, Nvidia extended support for the interconnect tech to the broader ecosystem.
Since then, everyone from Intel, Arm, Fujitsu, and Qualcomm have thrown their weight behind the technology. Intel even plans to release client systems that use NVLink fusion to connect its CPU chiplets to Nvidia's GPU dies.
[6]
"The adoption of NVLink Fusion reflects a broader industry shift toward heterogeneous, co-designed systems where open CPU architectures and advanced interconnects work together to define the future of AI data center computing," SiFive CEO Patrick Little said in a statement.
Officially, Nvidia supports two NVLink Fusion configs. The first combines partner CPUs with Nvidia's GPUs, while the second allows customers to combine Nvidia's Grace or Vera CPUs with their own custom XPUs or AI accelerators.
[7]Qualcomm takes RISC on Arm alternative with Ventana acquisition
[8]India unveils a homegrown dual-core 1GHz RISC-V processor, the DHRUV64
[9]Tenstorrent QuietBox tested: A high-performance RISC-V AI workstation trapped in a software blackhole
[10]HPC won't be an x86 monoculture forever – and it's starting to show
As for SiFive, the startup is focusing its attention on enabling its customers to build custom CPUs that use its cores, plus SoC reference designs for integration with Nvidia's CPUs.
"By integrating NVLink Fusion with SiFive's high-performance compute subsystems, we're enabling customers with an open and customizable CPU platform that pairs seamlessly with NVIDIA's AI Infrastructure to deliver exceptional efficiency at data center scale," Little said.
We may never know if anyone uses SiFive's NVLink compatibility features because the company’s customers don't make a habit of disclosing which IP they've licensed (other than in some [11]isolated cases ).
[12]
With that said, the company tells us it has a "number of datacenter design licenses and several have taped out.” But it’s not ready to announce any new ones “at this time."
The growing momentum behind Nvidia's NVLink Fusion interconnects comes as AMD prepares and brings one of the first UALink-based AI [13]rack systems to market with the MI455X-based Helios.
UALink was [14]envisioned as an open alternative to NVLink with backing from Intel, AMD, Amazon, Meta, Microsoft, and Arm to name a few. However, standards are hard. A lack of UALink switches forced AMD to tunnel the protocol over standard Ethernet. Further complicating the matter, Broadcom, once a strong backer of the standard, is now pushing its own interconnect fabric called Scale Up Ethernet or [15]SUE . ®
Get our [16]Tech Resources
[1] https://www.sifive.com/press/sifive-nvidia-nvlinkfusion-datacenter
[2] https://pubads.g.doubleclick.net/gampad/jump?co=1&iu=/6978/reg_onprem/systems&sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&tile=2&c=2aWnF8RDWmm5mFOdf0fzAQQAAA5I&t=ct%3Dns%26unitnum%3D2%26raptor%3Dcondor%26pos%3Dtop%26test%3D0
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[5] https://www.theregister.com/2025/05/19/nvidia_nvlink_fusion/
[6] https://pubads.g.doubleclick.net/gampad/jump?co=1&iu=/6978/reg_onprem/systems&sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&tile=4&c=44aWnF8RDWmm5mFOdf0fzAQQAAA5I&t=ct%3Dns%26unitnum%3D4%26raptor%3Dfalcon%26pos%3Dmid%26test%3D0
[7] https://www.theregister.com/2025/12/10/qualcomm_riscv_arm_ventana/
[8] https://www.theregister.com/2025/12/17/dhruv64_india_homegrown_processor/
[9] https://www.theregister.com/2025/11/27/tenstorrent_quietbox_review/
[10] https://www.theregister.com/2025/11/27/arm_riscv_hpc/
[11] https://www.theregister.com/2022/09/23/google_using_sifive_riscv_cores/
[12] https://pubads.g.doubleclick.net/gampad/jump?co=1&iu=/6978/reg_onprem/systems&sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&tile=3&c=33aWnF8RDWmm5mFOdf0fzAQQAAA5I&t=ct%3Dns%26unitnum%3D3%26raptor%3Deagle%26pos%3Dmid%26test%3D0
[13] https://www.theregister.com/2026/01/07/mi500x_amd_ai/
[14] https://www.theregister.com/2025/04/08/ualink_200g_version_1/
[15] https://www.theregister.com/2025/07/15/broadcom_ethernet_scale_up/
[16] https://whitepapers.theregister.com/
SiFive designs CPU cores and processors based on the RISC-V instruction set architecture (ISA) for use in a variety of applications ranging from the edge to the datacenter. The company licenses its designs to customers, who can use them in their own silicon, an arrangement similar to Arm’s business model.
With today's [1]announcement , SiFive’s designs will now include support for NVLink.
[2]
NVLink enables Nvidia’s customers to abstract a rack full of CPUs and GPUs as a single unified accelerator. The tech offers up to 3.6 TB/s of chip-to-chip bandwidth.
[3]
[4]
Until recently, Nvidia kept NVLink to itself. However, with the [5]introduction of NVLink Fusion last year, Nvidia extended support for the interconnect tech to the broader ecosystem.
Since then, everyone from Intel, Arm, Fujitsu, and Qualcomm have thrown their weight behind the technology. Intel even plans to release client systems that use NVLink fusion to connect its CPU chiplets to Nvidia's GPU dies.
[6]
"The adoption of NVLink Fusion reflects a broader industry shift toward heterogeneous, co-designed systems where open CPU architectures and advanced interconnects work together to define the future of AI data center computing," SiFive CEO Patrick Little said in a statement.
Officially, Nvidia supports two NVLink Fusion configs. The first combines partner CPUs with Nvidia's GPUs, while the second allows customers to combine Nvidia's Grace or Vera CPUs with their own custom XPUs or AI accelerators.
[7]Qualcomm takes RISC on Arm alternative with Ventana acquisition
[8]India unveils a homegrown dual-core 1GHz RISC-V processor, the DHRUV64
[9]Tenstorrent QuietBox tested: A high-performance RISC-V AI workstation trapped in a software blackhole
[10]HPC won't be an x86 monoculture forever – and it's starting to show
As for SiFive, the startup is focusing its attention on enabling its customers to build custom CPUs that use its cores, plus SoC reference designs for integration with Nvidia's CPUs.
"By integrating NVLink Fusion with SiFive's high-performance compute subsystems, we're enabling customers with an open and customizable CPU platform that pairs seamlessly with NVIDIA's AI Infrastructure to deliver exceptional efficiency at data center scale," Little said.
We may never know if anyone uses SiFive's NVLink compatibility features because the company’s customers don't make a habit of disclosing which IP they've licensed (other than in some [11]isolated cases ).
[12]
With that said, the company tells us it has a "number of datacenter design licenses and several have taped out.” But it’s not ready to announce any new ones “at this time."
The growing momentum behind Nvidia's NVLink Fusion interconnects comes as AMD prepares and brings one of the first UALink-based AI [13]rack systems to market with the MI455X-based Helios.
UALink was [14]envisioned as an open alternative to NVLink with backing from Intel, AMD, Amazon, Meta, Microsoft, and Arm to name a few. However, standards are hard. A lack of UALink switches forced AMD to tunnel the protocol over standard Ethernet. Further complicating the matter, Broadcom, once a strong backer of the standard, is now pushing its own interconnect fabric called Scale Up Ethernet or [15]SUE . ®
Get our [16]Tech Resources
[1] https://www.sifive.com/press/sifive-nvidia-nvlinkfusion-datacenter
[2] https://pubads.g.doubleclick.net/gampad/jump?co=1&iu=/6978/reg_onprem/systems&sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&tile=2&c=2aWnF8RDWmm5mFOdf0fzAQQAAA5I&t=ct%3Dns%26unitnum%3D2%26raptor%3Dcondor%26pos%3Dtop%26test%3D0
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[4] https://pubads.g.doubleclick.net/gampad/jump?co=1&iu=/6978/reg_onprem/systems&sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&tile=3&c=33aWnF8RDWmm5mFOdf0fzAQQAAA5I&t=ct%3Dns%26unitnum%3D3%26raptor%3Deagle%26pos%3Dmid%26test%3D0
[5] https://www.theregister.com/2025/05/19/nvidia_nvlink_fusion/
[6] https://pubads.g.doubleclick.net/gampad/jump?co=1&iu=/6978/reg_onprem/systems&sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&tile=4&c=44aWnF8RDWmm5mFOdf0fzAQQAAA5I&t=ct%3Dns%26unitnum%3D4%26raptor%3Dfalcon%26pos%3Dmid%26test%3D0
[7] https://www.theregister.com/2025/12/10/qualcomm_riscv_arm_ventana/
[8] https://www.theregister.com/2025/12/17/dhruv64_india_homegrown_processor/
[9] https://www.theregister.com/2025/11/27/tenstorrent_quietbox_review/
[10] https://www.theregister.com/2025/11/27/arm_riscv_hpc/
[11] https://www.theregister.com/2022/09/23/google_using_sifive_riscv_cores/
[12] https://pubads.g.doubleclick.net/gampad/jump?co=1&iu=/6978/reg_onprem/systems&sz=300x50%7C300x100%7C300x250%7C300x251%7C300x252%7C300x600%7C300x601&tile=3&c=33aWnF8RDWmm5mFOdf0fzAQQAAA5I&t=ct%3Dns%26unitnum%3D3%26raptor%3Deagle%26pos%3Dmid%26test%3D0
[13] https://www.theregister.com/2026/01/07/mi500x_amd_ai/
[14] https://www.theregister.com/2025/04/08/ualink_200g_version_1/
[15] https://www.theregister.com/2025/07/15/broadcom_ethernet_scale_up/
[16] https://whitepapers.theregister.com/