Intel Xeon Diamond Rapids EDAC Driver Changes Readied For Linux 7.2
- Reference: 0001637327
- News link: https://www.phoronix.com/news/Intel-Diamond-Rapids-EDAC-RRL
- Source link:
With Diamond Rapids' Retry Read Error Log "RRL" it now operates at a sub memory channel granularity and thus the Intel EDAC driver code had to be restructured. Over the course of several patches queued into the "edac-for-next" Git branch that has now taken place. Following the prep work is [2]this patch going ahead in enabling RRL support for intel Xeon Diamond Rapids.
"Compared to previous generations, Diamond Rapids RRL (Retry Read error Log) operates at DDR sub-channel granularity and adds an extra register per set. It also increases the CORRERRCNT register width from 4 to 8 bytes while reducing the number of registers from 8 to 4.
Add the Diamond Rapids RRL register configuration table and enable support."
With that support in edac-for-next, it's in turn expected to be merged later this month for the Linux 7.2 kernel merge window.
Separately, also queued in the past few days to edac-for-next is adding [3]Nova Lake H SoC support to the IGEN6 EDAC driver. Nova Lake H's memory controller registers and in-band ECC registers are similar to Panther Lake H but with some minor differences now accommodated for in that queued code for allowing EDAC support on that next-gen SoC.
[1] https://www.phoronix.com/review/intel-xeon-6-plus-cri-e835
[2] https://git.kernel.org/pub/scm/linux/kernel/git/ras/ras.git/commit/?h=edac-for-next&id=bdfc4367e3f516479e0a68c731bea5c6638a6c7e
[3] https://git.kernel.org/pub/scm/linux/kernel/git/ras/ras.git/commit/?h=edac-for-next&id=96780b953bac89bc624c3bf326a090f069d8d277