Arm C1-Ultra Scheduling Model Merged For LLVM/Clang 23
([Arm] 6 Hours Ago
C1-Ultra)
- Reference: 0001629537
- News link: https://www.phoronix.com/news/Arm-C1-Ultra-Sched-LLVM-Clang
- Source link:
Merged recently to the latest LLVM/Clang compiler development tree is the Arm C1-Ultra scheduling model for helping with delivering optimal binaries for that flagship next-gen Arm mobile CPU.
The Arm C1-Ultra is the flagship model of Arm's [1]C1 CPUs announced last September . Now for going beyond the basic compiler enablement for the Arm C1 that [2]previously landed into the LLVM 22 codebase , a proper scheduling model is now in place for the C1-Ultra.
The C1-Ultra scheduling model is derived from the Neoverse V3 scheduling model while making changes based upon Arm's software optimization guide for the C1-Ultra core. This should help in ensuring the best possible performance for binaries targeting this flagship Armv9.3-A CPU core.
Arm's C1-Ultra [3]claims include +25% single thread performance over the Cortex-X925, +15% speed-up on average in real-world applications, and other big wins for this Armv9.3-A + SME2 design.
Those curious about this new C1-Ultra scheduling model can find it in [4]LLVM Git ahead of the LLVM 23 stable release later in the year.
[1] https://www.phoronix.com/news/Arm-Lumex-Platform-C1
[2] https://www.phoronix.com/news/LLVM-Clang-22-Branched
[3] https://www.arm.com/products/silicon-ip-cpu/c1-ultra
[4] https://github.com/llvm/llvm-project/commit/b6c9cbe69d96ac80c3ed42b09c19dddc15df464e
The Arm C1-Ultra is the flagship model of Arm's [1]C1 CPUs announced last September . Now for going beyond the basic compiler enablement for the Arm C1 that [2]previously landed into the LLVM 22 codebase , a proper scheduling model is now in place for the C1-Ultra.
The C1-Ultra scheduling model is derived from the Neoverse V3 scheduling model while making changes based upon Arm's software optimization guide for the C1-Ultra core. This should help in ensuring the best possible performance for binaries targeting this flagship Armv9.3-A CPU core.
Arm's C1-Ultra [3]claims include +25% single thread performance over the Cortex-X925, +15% speed-up on average in real-world applications, and other big wins for this Armv9.3-A + SME2 design.
Those curious about this new C1-Ultra scheduling model can find it in [4]LLVM Git ahead of the LLVM 23 stable release later in the year.
[1] https://www.phoronix.com/news/Arm-Lumex-Platform-C1
[2] https://www.phoronix.com/news/LLVM-Clang-22-Branched
[3] https://www.arm.com/products/silicon-ip-cpu/c1-ultra
[4] https://github.com/llvm/llvm-project/commit/b6c9cbe69d96ac80c3ed42b09c19dddc15df464e