Intel LASS, SGX EUPDATESVN & Microcode Staging Features Land In Linux 6.19
([Intel] 4 Hours Ago
New Intel Features)
- Reference: 0001596465
- News link: https://www.phoronix.com/news/Intel-LASS-SGX-And-More-6.19
- Source link:
In addition to [1]new AMD CPU features being merged today for Linux 6.19 , there are also some new Intel CPU features that hit Linux Git today that are worth highlighting.
The [2]EDAC changes were merged today for the Error Detection And Correction drivers. Notable there is introducing "imh_edac" as a new EDAC driver for supporting next-generation Intel Diamond Rapids processors plus other future Intel CPUs making use of this new memory controller architecture. More details on that new EDAC driver for Diamond Rapids and other details within the prior article [3]Intel "imh_edac" Driver Being Developed For New Memory Controller With Diamond Rapids .
The [4]x86/microcode pull that was also merged hours ago add a new microcode staging feature for Intel CPUs. This punts the microcode blob loading into a non-critical path to reduce the microcode loading latency to a minimum in order to reduce downtime when applying microcode updates. This feature was covered previously on Phoronix as well when under development within [5]Intel Introducing Microcode Staging Feature For Linux 6.19 To Cope With Bigger Blobs .
Another new Intel feature hitting the Linux tree today is via the [6]x86/sgx pull . For Intel Software Guard Extensions (SGX) is now support for the EUPDATESVN SGX ISA that has been around since Ice Lake. This is designed to [7]help with live microcode updates affecting SGX functionality . This will help [8]address/patch any SGX security issues but still avoiding a system restart in order to minimize server downtime.
A big feature hitting Linux 6.19 Git today on the Intel side is finally having [9]Linear Address Space Separation for the mainline kernel. The [10]x86/cpu pull landed Intel LASS. This Linux support has been years in the making and [11]helps mitigate a class of side-channel attacks that rely on speculative access across the user/kernel boundary .
Lastly, with the [12]x86/cache merge that added AMD SDCI support, the other notable change there is on the Intel side and is adding Xeon 6+ Clearwater Forest to the list of CPUs capable of Sub-NUMA Clustering (SNC) support.
A busy day in kernel-space for both AMD and Intel CPUs for Linux 6.19. Linux 6.19 kernel benchmarks at Phoronix will begin once the two-week merge window settles down.
[1] https://www.phoronix.com/news/AMD-Zen-6-RAS-SDCI-Linux-6.19
[2] https://lore.kernel.org/lkml/20251201121852.GAaS2HrICVFEQyuAIh@fat_crate.local/
[3] https://www.phoronix.com/news/Intel-Diamond-Rapids-EDAC-IMH
[4] https://lore.kernel.org/lkml/20251201131437.GAaS2Uvak9SqT1BOkJ@fat_crate.local/
[5] https://www.phoronix.com/news/Intel-Microcode-Staging-Linux
[6] https://lore.kernel.org/lkml/20251201224701.726470-1-dave.hansen@linux.intel.com/
[7] https://www.phoronix.com/news/Intel-SGX-Live-Microcode-Update
[8] https://www.phoronix.com/news/Intel-SGX-EUPDATESVN-Linux-6.19
[9] https://www.phoronix.com/search/Linear+Address+Space+Separation
[10] https://lore.kernel.org/lkml/20251201231537.736899-1-dave.hansen@linux.intel.com/
[11] https://www.phoronix.com/news/Intel-LASS-For-Linux-6.19
[12] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2ae20d651091c71ef182d28cbf10ce6f8be79c99
The [2]EDAC changes were merged today for the Error Detection And Correction drivers. Notable there is introducing "imh_edac" as a new EDAC driver for supporting next-generation Intel Diamond Rapids processors plus other future Intel CPUs making use of this new memory controller architecture. More details on that new EDAC driver for Diamond Rapids and other details within the prior article [3]Intel "imh_edac" Driver Being Developed For New Memory Controller With Diamond Rapids .
The [4]x86/microcode pull that was also merged hours ago add a new microcode staging feature for Intel CPUs. This punts the microcode blob loading into a non-critical path to reduce the microcode loading latency to a minimum in order to reduce downtime when applying microcode updates. This feature was covered previously on Phoronix as well when under development within [5]Intel Introducing Microcode Staging Feature For Linux 6.19 To Cope With Bigger Blobs .
Another new Intel feature hitting the Linux tree today is via the [6]x86/sgx pull . For Intel Software Guard Extensions (SGX) is now support for the EUPDATESVN SGX ISA that has been around since Ice Lake. This is designed to [7]help with live microcode updates affecting SGX functionality . This will help [8]address/patch any SGX security issues but still avoiding a system restart in order to minimize server downtime.
A big feature hitting Linux 6.19 Git today on the Intel side is finally having [9]Linear Address Space Separation for the mainline kernel. The [10]x86/cpu pull landed Intel LASS. This Linux support has been years in the making and [11]helps mitigate a class of side-channel attacks that rely on speculative access across the user/kernel boundary .
Lastly, with the [12]x86/cache merge that added AMD SDCI support, the other notable change there is on the Intel side and is adding Xeon 6+ Clearwater Forest to the list of CPUs capable of Sub-NUMA Clustering (SNC) support.
A busy day in kernel-space for both AMD and Intel CPUs for Linux 6.19. Linux 6.19 kernel benchmarks at Phoronix will begin once the two-week merge window settles down.
[1] https://www.phoronix.com/news/AMD-Zen-6-RAS-SDCI-Linux-6.19
[2] https://lore.kernel.org/lkml/20251201121852.GAaS2HrICVFEQyuAIh@fat_crate.local/
[3] https://www.phoronix.com/news/Intel-Diamond-Rapids-EDAC-IMH
[4] https://lore.kernel.org/lkml/20251201131437.GAaS2Uvak9SqT1BOkJ@fat_crate.local/
[5] https://www.phoronix.com/news/Intel-Microcode-Staging-Linux
[6] https://lore.kernel.org/lkml/20251201224701.726470-1-dave.hansen@linux.intel.com/
[7] https://www.phoronix.com/news/Intel-SGX-Live-Microcode-Update
[8] https://www.phoronix.com/news/Intel-SGX-EUPDATESVN-Linux-6.19
[9] https://www.phoronix.com/search/Linear+Address+Space+Separation
[10] https://lore.kernel.org/lkml/20251201231537.736899-1-dave.hansen@linux.intel.com/
[11] https://www.phoronix.com/news/Intel-LASS-For-Linux-6.19
[12] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2ae20d651091c71ef182d28cbf10ce6f8be79c99