AMD Sends Out Initial GNU Binutils Patch For AMD Zen 6 - Confirms New AVX-512 Features
([AMD] 4 Hours Ago
AMD Znver6)
- Reference: 0001590114
- News link: https://www.phoronix.com/news/AMD-Zen-6-Znver6-Binutils
- Source link:
AMD has begun their open-source compiler enablement upstreaming effort for [1]Zen 6 processors! The first "Znver6" patch was sent out on Friday in preparing for new instructions to be found with these next-generation AMD Ryzen and EPYC processors.
The GNU Binutils patch plumbing the new "Znver6" target to the GNU Assembler (Gas) most notably confirms the new CPU ISA additions over current-generation Zen 5 processors. On top of Znver5, the new Znver6 target adds: AVX512_BMM, AVX_NE_CONVERT, AVX_IFMA, AVX_VNNI_INT8, AVX512_FP16 . Namely more Advanced Vector Extensions (AVX) additions and continuing to build out their AVX-512 offerings inline with Intel.
Most interesting is AMD's new AVX-512 BMM. The new AVX-512 BMM instructions are new bit manipulation instructions for matrix multiply and bit reversal. Besides AVX-512 BMM (AVX512_BMM), the other ISA features have been found with other Intel (Xeon) processors.
The GNU Binutils patch can be found on the [2]mailing list for AMD Zen 6. Hopefully the GCC compiler and LLVM/Clang patches for Zen 6 aren't too far behind now. Great seeing them get out this support early so will hopefully be part of GCC 16 and LLVM/Clang 22 ahead of AMD Zen 6 processors shipping later in 2026.
[1] https://www.phoronix.com/search/Zen+6
[2] https://sourceware.org/pipermail/binutils/2025-November/145449.html
The GNU Binutils patch plumbing the new "Znver6" target to the GNU Assembler (Gas) most notably confirms the new CPU ISA additions over current-generation Zen 5 processors. On top of Znver5, the new Znver6 target adds: AVX512_BMM, AVX_NE_CONVERT, AVX_IFMA, AVX_VNNI_INT8, AVX512_FP16 . Namely more Advanced Vector Extensions (AVX) additions and continuing to build out their AVX-512 offerings inline with Intel.
Most interesting is AMD's new AVX-512 BMM. The new AVX-512 BMM instructions are new bit manipulation instructions for matrix multiply and bit reversal. Besides AVX-512 BMM (AVX512_BMM), the other ISA features have been found with other Intel (Xeon) processors.
The GNU Binutils patch can be found on the [2]mailing list for AMD Zen 6. Hopefully the GCC compiler and LLVM/Clang patches for Zen 6 aren't too far behind now. Great seeing them get out this support early so will hopefully be part of GCC 16 and LLVM/Clang 22 ahead of AMD Zen 6 processors shipping later in 2026.
[1] https://www.phoronix.com/search/Zen+6
[2] https://sourceware.org/pipermail/binutils/2025-November/145449.html