Intel Simplifying P-State Driver's Energy Model For Newer Core Ultra CPUs
([Intel] 5 Hours Ago
intel_pstate Energy Model)
- Reference: 0001583845
- News link: https://www.phoronix.com/news/Intel-P-State-Simplify-Energy
- Source link:
Intel engineer and Linux power management subsystem maintainer Rafael Wysocki posted a set of patches this week to simplify the energy model used by Core Ultra hybrid systems with a mix of P and E cores while lacking SMT support, such as with the current Lunar Lake SoCs and upcoming Panther Lake.
Wysocki realized that the energy model used by the Intel P-State driver on these newer Intel hybrid laptops is much more complicated than necessary and so he took to simplifying the code. He summed up of the new energy model:
"The new energy model uses less memory and it introduces less overhead into the scheduler (mostly due to the reduction of the states table size).
...
Use the above observations for simplifying the default energy model for hybrid platforms in intel_pstate as follows:
* A performance-independent cost coefficient is introduced for each CPU type.
* The number of states in each PD is reduced to 2 (it is not necessary to use more of them because the cost per scale-invariant utilization point does not depend on the performance level any more).
* CPUs without L3 cache (LPE-cores) that are expected to be the most energy-efficient ones are prioritized over any other CPUs.
* The CPU type value from CPUID (now easliy accessible through cpu_data[]) is used for identifying P-cores and E-cores instead of hybrid scaling factors which are less reliable.
* E-cores are preferred to P-cores.
The cost coefficients for different CPU types that can appear in a hybrid system (P-cores, E-cores, and LPE-cores that are effectively E-cores without L3 cache and with lower capacity) are chosen in accordance with the following rules:
* The cost priority of LPE-cores relative to E-cores is 1.5.
* The cost priority of E-cores relative to P-cores is 2, which also means that the cost priority of LPE-cores relative to
P-cores is 3."
The [1]patches are now out for testing. They are obviously too late for the v6.18 kernel but could potentially be ready for the v6.19 cycle in a few months. I'll work on some power/performance benchmarks of this Intel P-State simplification for hybrid CPUs without SMT soon.
[1] https://lore.kernel.org/linux-pm/5937608.DvuYhMxLoT@rafael.j.wysocki/
Wysocki realized that the energy model used by the Intel P-State driver on these newer Intel hybrid laptops is much more complicated than necessary and so he took to simplifying the code. He summed up of the new energy model:
"The new energy model uses less memory and it introduces less overhead into the scheduler (mostly due to the reduction of the states table size).
...
Use the above observations for simplifying the default energy model for hybrid platforms in intel_pstate as follows:
* A performance-independent cost coefficient is introduced for each CPU type.
* The number of states in each PD is reduced to 2 (it is not necessary to use more of them because the cost per scale-invariant utilization point does not depend on the performance level any more).
* CPUs without L3 cache (LPE-cores) that are expected to be the most energy-efficient ones are prioritized over any other CPUs.
* The CPU type value from CPUID (now easliy accessible through cpu_data[]) is used for identifying P-cores and E-cores instead of hybrid scaling factors which are less reliable.
* E-cores are preferred to P-cores.
The cost coefficients for different CPU types that can appear in a hybrid system (P-cores, E-cores, and LPE-cores that are effectively E-cores without L3 cache and with lower capacity) are chosen in accordance with the following rules:
* The cost priority of LPE-cores relative to E-cores is 1.5.
* The cost priority of E-cores relative to P-cores is 2, which also means that the cost priority of LPE-cores relative to
P-cores is 3."
The [1]patches are now out for testing. They are obviously too late for the v6.18 kernel but could potentially be ready for the v6.19 cycle in a few months. I'll work on some power/performance benchmarks of this Intel P-State simplification for hybrid CPUs without SMT soon.
[1] https://lore.kernel.org/linux-pm/5937608.DvuYhMxLoT@rafael.j.wysocki/