AMD ROCm 6.4 Adds SPIR-V Linking Support To HIP
([AMD] 2 Hours Ago
SPIR-V Linking With HIP)
- Reference: 0001541867
- News link: https://www.phoronix.com/news/AMD-ROCm-6.4-SPIR-V-Linker
- Source link:
With the recently released [1]AMD ROCm 6.4 release for this open-source GPU compute stack for Radeon and Instinct hardware there are yet more indications around AMD's growing software ecosystem expansion. With ROCm 6.4 are additions to the HIP API for allowing linking of SPIR-V code objects, which is the intermediate representation used by Vulkan as well as with OpenCL and other Khronos APIs.
It wasn't prominently mentioned in the ROCm 6.4 release highlights, but when digging through the ROCm 6.4 release notes some interesting items jumped out. New to the ROCm 6.4 HIP APIs are:
hipLinkAddData adds SPIR-V code object data to linker instance with options.
hipLinkAddFile adds SPIR-V code object file to linker instance with options.
AMD ROCm/HIP now supports linking [2]SPIR-V code object data and SPIR-V object files. SPIR-V is the intermediate representation / binary intermediate language used predominantly by Vulkan but can also be ingested by OpenCL 2.x/3.0 and OpenGL 4.6. Microsoft as well [3]announced last year their work on SPIR-V for Direct3D in place of DXIL. Plus various other SPIR-V uses throughout the software ecosystem thanks to being an open Khronos Group standard. Being able to easily link SPIR-V within AMD HIP use-cases opens up new doors as well and can enhance ROCm/HIP interoperability with other industry APIs.
This move isn't entirely surprising though as one year ago I wrote about an AMD ROCm developer [4]working on vendor-flavored SPIR-V within LLVM. Last year AMD engineers also worked on [5]a MLIR to SPIR-V pass . Plus all of the other happenings going on around the ROCm compute stack tied to LLVM / IREE / MLIR. To put it simply, there's a lot of active AMD software engineering that has been going on around LLVM / MLIR / IREE / SPIR-V.
I am still trying to figure out all of what AMD's plans are around their elusive "Unified AI Software Stack" with broad AI/compute support across all of their different CPU / NPU / GPU / accelerator products, but there's a good chance SPIR-V is part of that and these HIP API additions in ROCm 6.4 are another baby step in that direction. For more background on the Unified AI Software Stack talk, see last summer's [6]AMD's Unified AI Software Stack Might Be A Boon For Other Vulkan/SPIR-V Hardware Too .
Hopefully we'll learn more about their grand AMD ROCm and Unified AI Software Stack plans coming up at [7]the next AMD Advancing AI event set for 12 June.
[1] https://www.phoronix.com/news/AMD-ROCm-6.4-Released
[2] https://www.phoronix.com/search/SPIR-V
[3] https://www.phoronix.com/news/DirectX-Adopting-SPIR-V
[4] https://www.phoronix.com/news/LLVM-AMDGCN-Flavored-SPIR-V
[5] https://www.phoronix.com/news/LLVM-19-MLIR-To-SPIR-V
[6] https://www.phoronix.com/news/Unified-AI-Software-MLIR-SPIR-V
[7] https://www.phoronix.com/news/AMD-ROCm-June-2025-Announcement
It wasn't prominently mentioned in the ROCm 6.4 release highlights, but when digging through the ROCm 6.4 release notes some interesting items jumped out. New to the ROCm 6.4 HIP APIs are:
hipLinkAddData adds SPIR-V code object data to linker instance with options.
hipLinkAddFile adds SPIR-V code object file to linker instance with options.
AMD ROCm/HIP now supports linking [2]SPIR-V code object data and SPIR-V object files. SPIR-V is the intermediate representation / binary intermediate language used predominantly by Vulkan but can also be ingested by OpenCL 2.x/3.0 and OpenGL 4.6. Microsoft as well [3]announced last year their work on SPIR-V for Direct3D in place of DXIL. Plus various other SPIR-V uses throughout the software ecosystem thanks to being an open Khronos Group standard. Being able to easily link SPIR-V within AMD HIP use-cases opens up new doors as well and can enhance ROCm/HIP interoperability with other industry APIs.
This move isn't entirely surprising though as one year ago I wrote about an AMD ROCm developer [4]working on vendor-flavored SPIR-V within LLVM. Last year AMD engineers also worked on [5]a MLIR to SPIR-V pass . Plus all of the other happenings going on around the ROCm compute stack tied to LLVM / IREE / MLIR. To put it simply, there's a lot of active AMD software engineering that has been going on around LLVM / MLIR / IREE / SPIR-V.
I am still trying to figure out all of what AMD's plans are around their elusive "Unified AI Software Stack" with broad AI/compute support across all of their different CPU / NPU / GPU / accelerator products, but there's a good chance SPIR-V is part of that and these HIP API additions in ROCm 6.4 are another baby step in that direction. For more background on the Unified AI Software Stack talk, see last summer's [6]AMD's Unified AI Software Stack Might Be A Boon For Other Vulkan/SPIR-V Hardware Too .
Hopefully we'll learn more about their grand AMD ROCm and Unified AI Software Stack plans coming up at [7]the next AMD Advancing AI event set for 12 June.
[1] https://www.phoronix.com/news/AMD-ROCm-6.4-Released
[2] https://www.phoronix.com/search/SPIR-V
[3] https://www.phoronix.com/news/DirectX-Adopting-SPIR-V
[4] https://www.phoronix.com/news/LLVM-AMDGCN-Flavored-SPIR-V
[5] https://www.phoronix.com/news/LLVM-19-MLIR-To-SPIR-V
[6] https://www.phoronix.com/news/Unified-AI-Software-MLIR-SPIR-V
[7] https://www.phoronix.com/news/AMD-ROCm-June-2025-Announcement
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