More Intel AVX10.2 Enablement Lands In The GCC 15 Compiler
- Reference: 0001487696
- News link: https://www.phoronix.com/news/GCC-15-More-AVX10.2-Instruct
- Source link:
The initial batch of AVX10.2 enablement earlier in the month was mostly focused on adding the infrastructure with the new "-max10.2-256" and "-mavx10.2-512" switches and similar. AVX10.2 is coming with future Intel processors and is notable in that it's the first AVX10 version that will be found on both Intel P cores and E cores. AVX10.2 adds new AVX10 BF16 instructions, compare scalar FP with enhanced eflags, new convert instructions, integer and FP16 VNNI media new instructions, new min/max instructions, and saturating convert instructions.
With today's GCC 15 Git code, more of those new AVX10.2 instructions are now implemented. The newly-merged GCC 15 code adds the AVX10.2 instructions for compare, vector copy, min max, convert, BF16 instructions, and new media instructions as well.
It's great seeing Intel's timely open-source compiler enablement of new features continues. The LLVM/Clang work around AVX10.2 also [2]continues .
GCC 15 will be introduced as stable with the GCC 15.1 release in the first few months of 2025. It's still not publicly clear what will be the first P and E cores sporting AVX10.2 but at least there will be a supported open-source compiler out in time.
[1] https://www.phoronix.com/news/GCC-15-Merges-Initial-AVX10.2
[2] https://github.com/search?q=repo%3Allvm%2Fllvm-project+AVX10.2&type=pullrequests
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