News: 0001475836

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Linux Looking To Make 5-Level Paging Support Unconditional For x86_64 Kernel Builds

([Linux Kernel] 2 Hours Ago 5-Level Paging On AMD / Intel)


It's been nearly one decade since Intel began [1]working on 5-level paging support for the Linux kernel to allow for greater virtual and physical address space with expanding memory sizes. The 5-level paging kernel-side bits were [2]upstreamed back in Linux 4.12 in 2017 and [3]enabled by default since 2019 with Linux 5.5. Intel CPUs for a while (since Ice Lake) have supported 5-level paging and [4]AMD CPUs too since Zen 4. The Linux kernel may move to unconditionally enabling 5-level paging support for x86_64 kernel builds.

Intel is moving along to unconditionally enable [5]5-level paging support within the Linux kernel. This is about extending the virtual address size from 48 to 57 bits to allow up to 128PB of virtual memory.

[6]This patch series sent out recently by Intel engineer Kirill Shutemov aims to remove the "CONFIG_X86_5LEVEL" Kconfig build-time option and simply have 5-level paging always enabled for new x86_64 kernel builds.

"Both Intel and AMD CPUs support 5-level paging, which is expected to become more widely adopted in the future.

Remove CONFIG_X86_5LEVEL.

In preparation to that remove CONFIG_DYNAMIC_MEMORY_LAYOUT and make SPARSEMEM_VMEMMAP the only memory model."

In practice this doesn't mean a whole lot with most Linux distribution vendor kernels shipping with CONFIG_X86_5LEVEL enabled, but it's one less knob and a sign of the times with catering more of the upstream kernel to modern hardware needs.



[1] https://www.phoronix.com/news/Intel-5-Level-Paging

[2] https://www.phoronix.com/news/Intel-5-LVL-Paging-4.12-MM

[3] https://www.phoronix.com/news/Linux-5.5-5-Level-Paging

[4] https://www.phoronix.com/news/AMD-5-Level-Paging-KVM

[5] https://www.phoronix.com/search/5-level+paging

[6] https://lore.kernel.org/lkml/20240621164406.256314-1-kirill.shutemov@linux.intel.com/



phoronix

Non-sequiturs make me eat lampshades.